Morphological Image Processing Using Custom Instructions on Distributed Nios Processors

نویسندگان

  • Haichen Ren
  • David Jeff Jackson
چکیده

As a fundamental image processing block, morphological processing involves intensive computation and contributes significantly to an image processing system overhead. Depending on only spatially local data, several morphological operations can be implemented with parallel hardware to reduce the computation overhead. In this paper, we implement morphological image operations, which include dilation, erosion, and edge detection based on a 3x3 mask, on a distributed Altera NIOS soft core system. We also implement custom instructions to improve the system performance. Compared with a non-distributed system without custom instructions, the speedup of several morphological operations based upon the distributed system with custom instructions can reach 11.8. The system architecture and implementation details are presented.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Acceleration of block-matching algorithms using a custom instruction-based paradigm on a Nios II microprocessor

This contribution focuses on the optimization of matching-based motion estimation algorithms widely used for video coding standards using an Altera custom instruction-based paradigm and a combination of synchronous dynamic random access memory (SDRAM) with on-chip memory in Nios II processors. A complete profile of the algorithms is achieved before the optimization, which locates code leaks, an...

متن کامل

Customized Nios II multi-cycle instructions to accelerate block-matching techniques

This study focuses on accelerating the optimization of motion estimation algorithms, which are widely used in video coding standards, by using both the paradigm based on Altera Custom Instructions as well as the efficient combination of SDRAM and On-Chip memory of Nios II processor. Firstly, a complete code profiling is carried out before the optimization in order to detect time leaking affecti...

متن کامل

Using the NIOS II Processor for HW/SW Codesign of the JPEG2000

JPEG2000 is a recently standardized image compression algorithm that provides significant enhancements over the existing JPEG standard. JPEG2000 differs from widely used compression standards in that it relies on the Discrete Wavelet Transform (DWT) and uses embedded bit plane coding of the wavelet coefficients [1]. Due to the bit-oriented processing techniques used in the standard, full implem...

متن کامل

Strassen's matrix multiplication for customisable processors

Strassen S algorithm is an efficient method for mulliplying large matrices. We explore various ways of mapping Strassen ' s algorithm inlo reconfgurable hardware that contains one or more customisable instruction processors. Our approach has been implemented using Nios processors with custom inslrucfions and with custom-designed coprocessors, taking advantage of the additional logic and memory ...

متن کامل

Fpga Implementation of Deblocking Filter Custom Instruction Hardware on Nios-ii Based Soc

This paper presents a frame work for hardware acceleration for post video processing system implemented on FPGA. The deblocking filter algorithms ported on SOC having Altera NIOS-II soft core processor.SOC designed with the help of SOPC builder .Custom instructions are chosen by identifying the most frequently used tasks in the algorithm and the instruction set of NIOS-II processor has been ext...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2004